1. Field of the Invention
The present invention relates to a band gap constant-voltage circuit, in particular, a startup circuit capable of securely outputting an output voltage upon power-up to thereby achieve a quick startup time.
2. Description of the Related Art
FIG. 2 is a circuit diagram of a conventional band gap constant-voltage circuit. The voltage circuit is constituted of PMOS transistors P21, P22, P23, P24, and P25, NMOS transistors NL21, NL22, and NL23, an n-channel type depression transistor ND21, bipolar transistors B21 and B22, and resistors R21, R22, R23, and R24, and capacitor C21. In FIG. 2, when a ratio of the number of the bipolar transistor B21 provided as a first bipolar transistor to that of the bipolar transistor B22 provided as a second bipolar transistor is set to 1:N, an output voltage VREF expressed by an equation 1 can be obtained under a normal condition.VREF=VBE+Vtx1nN(1+R21/R22)  (equation 1)
In the equation 1, VBE is a voltage applied across the base and the emitter of a bipolar transistor, and Vt is obtained by the equation of Vt=kT/q, where k is a Boltzmann constant, T is an absolute temperature, and q is an electron charge. A state where the output voltage VREF is outputted is referred to as normal condition.
Therefore, the conventional example of FIG. 2 is configured so as to be capable of outputting a predetermined output voltage VREF from an output terminal under a stable normal condition when a power supply voltage is applied across a power supply terminal VDD of high potential and a power supply terminal VSS of low potential.
(Patent Document 1) JP 2004-318604 A
However, the conventional band gap constant-voltage circuit shown in FIG. 2 is slow in startup upon power-on, and therefore has a drawback in that the output voltage is stabilized at 0 V due to noise or the like even under the normal condition.